Entry Level First Level Chip Packaging Development Engineer

IBM Infrastructure has an opening for an entry level 1st Level Chip Packaging Development Engineer. As a member of this elite team of engineering professionals, you will develop solutions through high-speed serial channel analysis, power domain analysis, and 1st level chip packaging integration methodologies that enable hardware in Quantum systems. Additionally, members of this department partner with IBM Research on Custom Chip/Wafer Scale Integration and Quantum Cryogenic hardware development. Team members of this department impact IBMs diverse product portfolio through involvement in high-level design support, pre-production analysis, lab validation, and model-to-hardware correlation of early user hardware.

Qualified candidates will have excellent interpersonal, communications, critical thinking, and problem-solving skills paired with introductory knowledge of Signal and Power Integrity and 1st Level Chip Packaging design processes. Additional recommended skills include experience with signal and power integrity software such as ANSYS and Cadence tools suites and PCB design software. A background in electrical engineering, transmission line theory, digital signal processing, radio frequency design, and packaging and PCB materials/processes is helpful.

Perform strategic analysis on pre-production hardware designs utilizing commercially available and internally developed electromagnetic modelling tool suites, scripting and transient simulation methodologies to validate and improve the performance of innovative high-performance high-quality future designs supporting IBM business goals focused on the Quantum brand.

Develop and execute laboratory verification/characterization on early user hardware, enabling model-to-hardware correlation to add value to future hardware designs.

Collaborate with cross-site/cross-geo teams and leadership to establish and refine strategy for tackling aggressive product goals and schedules.

Continuously innovating design and development processes with the department and utilizing Agile best practices.

Experience in Engineering, Computer Science, Physics or related fields.

Industry work experience in Microprocessor, ASIC, Signal and Power Integrity, 1st Level Chip Packaging, or Hardware Development environment

Demonstrated experience in technical execution

Demonstrated excellence in communication skills

Eagerness to learn, demonstrating a growth mindset

Ability to proactively solve problems independently and in a team environment

Basic understanding of Signal and Power Integrity analysis, including both time-domain and frequency-domain assessment of signaling channels and Power Distribution Networks

Basic understanding of Microprocessor and ASIC 1st Level Chip Packaging and hardware development

Experience with one or more programming skills such as Python, Skill, Perl, C++, Matlab

Basic skills with signal and power integrity simulation software tools

Demonstrated ability to develop peer, cross-functional, and-cross business relationships to maximize collaboration and team effectiveness

Demonstrated ability to work and excel in a fast-paced, dynamic, and constantly changing work environment